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Add symbols group; fix warning on empty sym file

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This commit is contained in:
Vadim Kuznetsov 2024-07-04 16:10:06 +03:00
parent fe130581b2
commit 0b477eac6d
2 changed files with 10 additions and 4 deletions
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4
qucs/extsimkernels/spicelibcompdialog.cpp
View File

@ -333,6 +333,10 @@ void SpiceLibCompDialog::slotSetSymbol()
listSymPattern->setEnabled(false);
edtSymFile->setEnabled(true);
btnOpenSym->setEnabled(true);
if (edtSymFile->text().isEmpty()) {
symbolPinsCount = 0;
return;
}
result = symbol->loadSymFile(edtSymFile->text());
symbolPinsCount = symbol->getPortsNumber();
}

10
qucs/projectView.cpp
View File

@ -84,6 +84,7 @@ ProjectView::refresh()
APPEND_ROW(m_model, tr("VHDL") );
APPEND_ROW(m_model, tr("Octave") );
APPEND_ROW(m_model, tr("Schematics") );
APPEND_ROW(m_model, tr("Symbols") );
APPEND_ROW(m_model, tr("SPICE") );
APPEND_ROW(m_model, tr("Others") );
@ -139,13 +140,14 @@ ProjectView::refresh()
}
APPEND_CHILD(6, columnData);
}
}
else if ((extName == "cir") || (extName=="ckt") ||
(extName=="sp")) {
} else if (extName == "sym") {
APPEND_CHILD(7,columnData);
} else if ((extName == "cir") || (extName=="ckt") ||
(extName=="sp")) {
APPEND_CHILD(8,columnData);
}
else {
APPEND_CHILD(8, columnData);
APPEND_CHILD(9, columnData);
}
}