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Add spice entry for T Flip Flop

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This commit is contained in:
Radvall 2023-03-31 22:15:26 +03:00
parent e5b6b4df20
commit aeeb2deef5
3 changed files with 24 additions and 2 deletions
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23
qucs/components/tff_SR.cpp
View File

@ -18,6 +18,7 @@
#include "tff_SR.h"
#include "node.h"
#include "misc.h"
#include "extsimkernels/spicecompat.h"
tff_SR::tff_SR()
{
@ -36,7 +37,8 @@ tff_SR::tff_SR()
tx = x1 + 4;
ty = y2 + 4;
Model = "tff_SR";
Name = "Y";
Name = "Y";
SpiceModel = "A";
}
Component * tff_SR::newOne()
@ -174,3 +176,22 @@ QString tff_SR::verilogCode( int )
" end\n";
return l;
}
QString tff_SR::spice_netlist(bool isXyce)
{
if (isXyce) return QString("");
QString s = SpiceModel + Name;
QString tmp_model = "model_" + Name;
QString td = spicecompat::normalize_value(getProperty("Delay")->Value);
s += " " + Ports.at(1)->Connection->Name;
s += " " + Ports.at(2)->Connection->Name;
s += " " + Ports.at(0)->Connection->Name;
s += " " + Ports.at(3)->Connection->Name;
s += " " + Ports.at(5)->Connection->Name;
s += " " + Ports.at(4)->Connection->Name;
s += " " + tmp_model + "\n";
s += QString(".model %1 d_dff(clk_delay=%2 set_delay=%2 reset_delay=%2 rise_delay=%2 fall_delay=%2)\n")
.arg(tmp_model).arg(td);
return s;
}

1
qucs/components/tff_SR.h
View File

@ -24,6 +24,7 @@ class tff_SR : public Component
void createSymbol();
QString vhdlCode(int);
QString verilogCode(int);
QString spice_netlist(bool isXyce);
};
#endif /* tff_SR_H */

2
qucs/module.cpp
View File

@ -450,7 +450,6 @@ void Module::registerModules (void) {
REGISTER_DIGITAL_1 (RS_FlipFlop);
REGISTER_DIGITAL_1 (D_FlipFlop);
REGISTER_DIGITAL_1 (JK_FlipFlop);
REGISTER_DIGITAL_1 (tff_SR);
REGISTER_DIGITAL_1 (gatedDlatch);
REGISTER_DIGITAL_1 (logic_0);
REGISTER_DIGITAL_1 (logic_1);
@ -482,6 +481,7 @@ void Module::registerModules (void) {
REGISTER_DIGITAL_1 (Logical_XNOR);
REGISTER_DIGITAL_1 (dff_SR);
REGISTER_DIGITAL_1 (jkff_SR);
REGISTER_DIGITAL_1 (tff_SR);
}
// file components