mirror of
https://github.com/ra3xdh/qucs_s
synced 2025-03-28 21:13:26 +00:00
* added "probes" category in components
This commit is contained in:
parent
ac0ce156e3
commit
d92c42c4cb
1
debian/qucs.desktop
vendored
1
debian/qucs.desktop
vendored
@ -6,6 +6,7 @@ Comment[es]=Un simulador universal de circuitos
|
||||
Comment[de]=Ein universeller Schaltkreissimulator
|
||||
Comment[pt]=Simulador universal de circuitos
|
||||
Comment[fr]=Simulateur universel de circuits
|
||||
Comment[it]=Simulatore universale di circuiti
|
||||
Exec=qucs %U
|
||||
Icon=/usr/share/pixmaps/big.qucs.xpm
|
||||
Terminal=false
|
||||
|
@ -318,6 +318,9 @@ pInfoFunc Sources[] =
|
||||
&Noise_iv::info, &AM_Modulator::info, &PM_Modulator::info, &iExp::info,
|
||||
&vExp::info, 0};
|
||||
|
||||
pInfoFunc Probes[] =
|
||||
{&iProbe::info, &vProbe::info, 0};
|
||||
|
||||
pInfoFunc TransmissionLines[] =
|
||||
{&TLine::info, &TLine_4Port::info, &TwistedPair::info, &CoaxialLine::info,
|
||||
&Substrate::info, &MSline::info, &MScoupled::info, &MScorner::info,
|
||||
@ -361,7 +364,7 @@ pInfoFunc Paintings[] =
|
||||
|
||||
// Order of the component groups in the ComboBox
|
||||
pInfoFunc *ComponentGroups[] =
|
||||
{lumpedComponents, Sources, TransmissionLines, nonlinearComps,
|
||||
{lumpedComponents, Sources, Probes, TransmissionLines, nonlinearComps,
|
||||
digitalComps, FileComponents, Simulations, Diagrams, 0};
|
||||
|
||||
// ---------------------------------------------------------------
|
||||
@ -373,6 +376,7 @@ void QucsApp::fillComboBox(bool setAll)
|
||||
if(setAll) {
|
||||
CompChoose->insertItem(tr("lumped components"));
|
||||
CompChoose->insertItem(tr("sources"));
|
||||
CompChoose->insertItem(tr("probes"));
|
||||
CompChoose->insertItem(tr("transmission lines"));
|
||||
CompChoose->insertItem(tr("nonlinear components"));
|
||||
CompChoose->insertItem(tr("digital components"));
|
||||
|
@ -7671,6 +7671,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -8066,6 +8066,10 @@ Vyrovnat svisle vybrané prvky</translation>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -8103,6 +8103,10 @@ Zentriert ausgewählte Elemente vertikal</translation>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7671,6 +7671,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7763,6 +7763,10 @@ Centre verticalement les éléments sélectionnés</translation>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7454,6 +7454,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7747,6 +7747,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -8118,6 +8118,10 @@ Centra verticalmente gli elementi selezionati</translation>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7573,6 +7573,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7740,6 +7740,10 @@ wyśrodkowuje w pionie wybrane elementy</translation>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -6942,6 +6942,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7544,6 +7544,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -8092,6 +8092,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7400,6 +7400,10 @@ Center vertically selected elements</source>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7435,6 +7435,10 @@ Seçili bileşenleri dikey olarak ortala</translation>
|
||||
<source>Cannot delete Verilog source: </source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
@ -7394,6 +7394,10 @@ About the application</source>
|
||||
About Qt by Trolltech</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
<message>
|
||||
<source>probes</source>
|
||||
<translation type="unfinished"></translation>
|
||||
</message>
|
||||
</context>
|
||||
<context>
|
||||
<name>QucsAttenuator</name>
|
||||
|
Loading…
x
Reference in New Issue
Block a user