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* added yet another TODO item

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ela 2009-03-10 19:34:07 +00:00
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TODO
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@ -23,6 +23,8 @@ unfixed) have a look at the file BUGS.
(completed tasks are indented one tab)
- different color/thickness of wires in order to visualize
different types of signals
- busses for digital designs (instead of wires only)
- keeping input/output type of VHDL subcircuits based on VHDL files
- real library creation using VHDL (precompiled objects as well as