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https://github.com/ra3xdh/qucs_s
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Merge pull request #927 from ra3xdh/upd_news
Update NEWS.md, VERSION, and library
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commit
e3bad51a94
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NEWS.md
29
NEWS.md
@ -1,3 +1,32 @@
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# Qucs-S 24.3.1
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## Packaging
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* Stable release packages are now generated autmatically using Github CI #871
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## Bugfixes and general improvements
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* Improved temperature sweep using unified devices #925
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* Fixed library manger always substitute absoute path #923
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* Fixed stars/circles/arrows plots rendering #892
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* Fixed library devices symbol text rendering #873
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* Fixed touchstones files export from GUI #910
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* Fixed mathicng circuit tool issues #905
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* Implemented SPICE entry for DC block and DC feed #889
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* Fixed Octave start #883
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* Fixed right scroll issue #884
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* Fixed wires selection issue #875
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* Fixed decimal separators processing in attenuator tool #864
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## Libraries
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* Update Optocoupler.lib #846
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## Localization
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* Updated Russian translation #885
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# Qucs-S 24.3.0
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## New features
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@ -1,17 +1,15 @@
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<Qucs Library 2.1.0 "Optocoupler">
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<Qucs Library 24.3.0 "Optocoupler">
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<Component 4N25>
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<Description>
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4N25 BJT optocoupler
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4N25 BJT optocoupler
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</Description>
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<Model>
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.Def:Optocoupler_4N25 _net0 _net1 _net2 _net3
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Sub:X1 _net0 _net1 _net2 _net3 gnd Type="n4N25_cir"
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.Def:End
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</Model>
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<ModelIncludes "4N25.cir.lst">
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<Spice>* Qucs 2.1.0 Optocoupler_4N25.sch
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<Spice>
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* OPTO-ISO from User Library in TURBO SPICE
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* Orig 8/17/99
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* Modified TMH 2/15/23
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@ -57,26 +55,24 @@ X1 _net0 _net1 _net2 _net3 4N25
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<Line -30 -6 0 -24 #000080 2 1>
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<Line 30 -15 0 -15 #000080 2 1>
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<Line -50 20 100 0 #808080 2 1>
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<.PortSym -30 -30 1 0>
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<.PortSym -30 30 2 0>
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<.PortSym 30 -30 3 180>
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<.PortSym 30 30 4 180>
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<.PortSym -30 -30 1 0 P1>
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<.PortSym -30 30 2 0 P2>
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<.PortSym 30 -30 3 180 P3>
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<.PortSym 30 30 4 180 P4>
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<.ID 70 -16 X>
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</Symbol>
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</Component>
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<Component 4N33>
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<Description>
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4N33 Darlington optocoupler
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4N33 Dralington optocoupler
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</Description>
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<Model>
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.Def:Optocoupler_4N33 _net3 _net4 _net2 _net0 _net1
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Sub:X2 _net0 _net1 _net2 _net3 _net4 gnd Type="n4n33_cir"
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.Def:End
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</Model>
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<ModelIncludes "4n33.cir.lst">
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<Spice>* Qucs 2.1.0 Optocoupler_4N33.sch
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<Spice>
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.subckt 4n33_MC 4 5 3 1 2
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* 4 -> LED ANODE 5 -> LED CATHODE
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* 3 -> EMITTER 1 -> COLLECTOR 2 -> BASE
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@ -168,26 +164,150 @@ X2 _net0 _net1 _net2 _net3 _net4 4n33_MC
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<Line 65 20 0 -40 #000080 2 1>
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<Line -45 20 110 0 #000080 2 1>
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<Line -45 -20 110 0 #000080 2 1>
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<.PortSym -30 -30 4 180>
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<.PortSym -30 30 5 0>
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<.PortSym 50 30 3 180>
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<.PortSym 50 -30 1 0>
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<.PortSym 20 -30 2 0>
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<.PortSym -30 -30 4 180 P4>
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<.PortSym -30 30 5 0 P5>
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<.PortSym 50 30 3 180 P3>
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<.PortSym 50 -30 1 0 P1>
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<.PortSym 20 -30 2 0 P2>
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</Symbol>
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</Component>
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<Component ACPLK30T>
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<Description>
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Automotive MOSFET driver photovoltaic optocoupler
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</Description>
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<Model>
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.Def:Optocoupler_ACPLK30T _net0 _net1 _net2 _net3
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Sub:X1 _net0 _net1 _net2 _net3 gnd Type="ACPLK30T_cir"
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.Def:End
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</Model>
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<Spice>
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* Copyright 2014 Avago Technologies
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* ACPL-K30T Spice Macromodel
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* Modified 2/22/23
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* ACPL-K30T.cir changed to ACPLK30T.cir to remove need for LTspice compat
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* Dietmar Warning, add NR=2 to .model PDC
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* https://sourceforge.net/p/ngspice/discussion/120973/thread/8c874eb3ec/
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*
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.subckt ACPLK30T AN CA VOUT+ VOUT-
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*E1 N002 CA N014 N016 {CTR} ; removed need for LTspice compat
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E1 N002 CA N014 N016 0.083
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XX1 AN CA N016 N014 vbu
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XX2 N002 CA N017 N015 pdnoc
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XX3 N002 CA N008 N017 pdnoc
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XX4 N002 CA N015 N013 pdnoc
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XX5 N002 CA N013 N012 pdnoc
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XX6 N002 CA N012 N010 pdnoc
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XX7 N002 CA N010 N007 pdnoc
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XX8 N002 CA N007 N004 pdnoc
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XX9 N002 CA N004 N003 pdnoc
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XX10 N002 CA N003 P001 pdnoc
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XX11 N002 CA P002 P003 pdnoc
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XX12 N002 CA P003 N001 pdnoc
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XX13 N002 CA P001 P002 pdnoc
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E2 N011 VOUT- N008 N001 1
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R2 N009 N011 1k
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D1 VOUT- N001 D
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D2 N008 VOUT+ D
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E3 N009 N006 N008 VOUT- 1
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Q1 VOUT+ N006 N005 0 NPN
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R3 VOUT- N005 3k
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C1 VOUT- N009 37n
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C2 VOUT- VOUT+ 100p
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*.param CTR=0.083 ; removed need for LTspice compat
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.ends ACPLK30T
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.subckt vbu AN CA LOPN LOPP
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RSERIES AN 5 5
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DELECT 5 CA VBUNOR
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ELED 6 LOPN 5 CA 1
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DOPTIC 6 8 VBUNORC
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FPHOTO LOPN 3 VSENSE 1
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VSENSE 8 LOPN 0
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RL 3 LOPN 0.1
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EOUT LOPP LOPN 3 LOPN 60
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VSIM LOPN CA 0
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Rnl 6 N001 5k
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Vnl N002 LOPN 0
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Fnl LOPN LOPN Vnl 1
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Dsw N001 N002 DSW
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.model DSW D Is=1e-4
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.model VBUNOR D IS=330E-21 N=1.5 XTI=3 EG=1.52 BV=10.38 IBV=100u CJO=60p VJ=.75 M=.3333 FC=.5 TT=20n
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.model VBUNORC D IS=330E-21 N=1.5 XTI=3 EG=1.52 BV=10.38 IBV=100u CJO=0 VJ=.75 M=.3333 FC=.5 TT=0
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.ends vbu
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.subckt pdnoc LOPP LOPN AN CA
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D1 AN CA PDC
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G1 CA AN LOPP LOPN 0.0010
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.model PDC D IS=1E-14 N=1.5 CJO=10p M=0.95 VJ=0.75 ISR=100.0E-12 BV=100 TT=5E-9 NR=2; NR=2 added for ngspice
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.ends pdnoc
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.model D D
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.model NPN NPN
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.model PNP PNP
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.SUBCKT Optocoupler_ACPLK30T gnd _net0 _net1 _net2 _net3
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X1 _net0 _net1 _net2 _net3 ACPLK30T
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.ENDS
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</Spice>
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<Symbol>
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<.ID -40 -96 U>
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<.PortSym -60 -30 1 0 AN>
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<.PortSym -60 30 2 0 CA>
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<.PortSym 80 -30 3 180 VOUT_P>
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<.PortSym 80 30 4 180 VOUT_N>
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<Line -30 -30 -30 0 #000080 2 1>
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<Line -60 30 30 0 #000080 2 1>
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<Line -40 -10 20 0 #000080 2 1>
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<Line -40 -10 10 20 #000080 2 1>
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<Line -40 10 20 0 #000080 2 1>
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<Line -30 30 0 -20 #000080 2 1>
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<Line -30 -30 0 20 #000080 2 1>
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<Line -30 10 10 -20 #000080 2 1>
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<Line 0 0 0 0 #000080 0 1>
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<Line 5 -5 -5 10 #000080 2 1>
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<Line -5 -5 10 0 #000080 2 1>
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<Line -15 5 20 -10 #000080 2 1>
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<Rectangle -50 -50 120 100 #000080 2 1 #c0c0c0 1 0>
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<Line 20 -30 60 0 #000080 2 1>
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<Line 20 -25 0 -5 #000080 2 1>
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<Line 20 30 0 -10 #000080 2 1>
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<Line 10 -25 20 0 #000080 2 1>
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<Line 10 -15 20 0 #000080 2 1>
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<Line 15 -10 10 0 #000080 2 1>
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<Line 10 -5 20 0 #000080 2 1>
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<Line 15 0 10 0 #000080 2 1>
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<Line 10 5 20 0 #000080 2 1>
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<Line 15 10 10 0 #000080 2 1>
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<Line 10 15 20 0 #000080 2 1>
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<Line 15 20 10 0 #000080 2 1>
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<Line 15 -20 10 0 #000080 2 1>
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<Line 80 30 -60 0 #000080 2 1>
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<Rectangle 40 -20 20 40 #000080 2 1 #c0c0c0 1 0>
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<Line 50 -20 0 -10 #000080 2 1>
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<Line 50 30 0 -10 #000080 2 1>
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<Text 46 16 5 #000080 90 "TURN OFF">
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<Line 50 -35 0 -10 #000080 2 1>
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<Line 45 -40 10 0 #000080 2 1>
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<Line 45 40 10 0 #000080 2 1>
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</Symbol>
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</Component>
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<Component MOC223>
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<Description>
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MOC223 Darlington optocoupler
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MOC223 Dralington optocoupler
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</Description>
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<Model>
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.Def:Optocoupler_MOC223 _net0 _net2 _net1 _net3 _net4
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Sub:X2 _net3 _net4 _net1 _net0 _net2 gnd Type="moc223_cir"
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.Def:End
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</Model>
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<ModelIncludes "moc223.cir.lst">
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<Spice>* Qucs 2.1.0 Optocoupler_MOC223.sch
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<Spice>
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.subckt moc223_MC 4 5 3 1 2
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@ -286,11 +406,11 @@ X2 _net3 _net4 _net1 _net0 _net2 moc223_MC
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<Line 65 20 0 -40 #000080 2 1>
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<Line -45 20 110 0 #000080 2 1>
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<Line -45 -20 110 0 #000080 2 1>
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<.PortSym -30 -30 4 180>
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<.PortSym -30 30 5 0>
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<.PortSym 50 30 3 180>
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<.PortSym 50 -30 1 0>
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<.PortSym 20 -30 2 0>
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<.PortSym -30 -30 4 180 P4>
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<.PortSym -30 30 5 0 P5>
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<.PortSym 50 30 3 180 P3>
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<.PortSym 50 -30 1 0 P1>
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<.PortSym 20 -30 2 0 P2>
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</Symbol>
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</Component>
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@ -304,9 +424,7 @@ model provided by Helmut Sennewald 11/23/2008
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Sub:X1 _net0 _net3 _net1 _net2 gnd Type="MOC3082_sub_cir"
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.Def:End
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</Model>
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<ModelIncludes "MOC3082_sub.cir.lst">
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<Spice>* Qucs 2.1.0 Optocoupler_MOC3082.sch
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<Spice>
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* OPTO TRIAC With Zero Crossing Switching
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* Helmut Sennewald 11/23/2008
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* 04/12/2009, change in B-sources: V(ctrl10) -> V(ctrl10,4)
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@ -358,10 +476,10 @@ X1 _net0 _net3 _net1 _net2 moc3082_sub
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</Spice>
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<Symbol>
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<.ID -40 -96 X>
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<.PortSym -60 -30 1 0>
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<.PortSym -60 30 2 0>
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<.PortSym 80 -30 3 180>
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<.PortSym 80 30 4 180>
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<.PortSym -60 -30 1 0 P1>
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<.PortSym -60 30 2 0 P2>
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<.PortSym 80 -30 3 180 P3>
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<.PortSym 80 30 4 180 P4>
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<Line -30 -30 -30 0 #000080 2 1>
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<Line -60 30 30 0 #000080 2 1>
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<Line -40 -10 20 0 #000080 2 1>
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